Portable industrial and consumer products tend toward smaller size, lower cost and increased functionality. These requirements place greater emphasis on the development of semiconductor packaging technologies which can accommodate larger, more complex integrated circuits in smaller packages capable of handling greater power densities.
Conventional surface mount technology utilizes leaded plastic packages. However, as the pitch and size of the leaded plastic packages keep on being reduced, such problems as poor solder assembly yields, due to poor control of lead coplanarity, and poor fine pitch solder printing yields, due to continuing shrinking of the lead pitch, continue to remain of major importance.
One type of packaging which seemed to overcome these problems is an Overmolded Plastic Pad Array Carrier (OMPAC) technology. OMPAC assembly utilizes a double-sided printed circuit or wiring board laminate. (Hereinafter the printed circuit board or printed wiring board will be referred to as "PWB"). The top side metallization of the PWB is comprised of a die pad for die attachment of an integrated circuit unit and grounding and wire bond fingers. The integrated circuit unit may include a semiconductor chip (a die), or multiple semiconductor chips, or a Multi-Chip Module (MCM) tile including at least one chip flip-chip mounted on a silicon substrate. The wire bond fingers extend outward to plated through holes (hereinafter referred to as "thruholes") in the PWB located near the edge of the package. The thruholes provide an electrical continuity from the top side to the bottom side of the PWB. The signal path is completed on the bottom side of the PWB by plated copper traces extending from the thruholes to solder pads for solder bump termination. Except for the solder bumps, all metal features on the PWB are photodefined, etched and electroplated with copper, nickel and gold. Conventional epoxy die attach and wire bonding technologies are used to interconnect the integrated circuit unit to the PWB. After the die and wire bonding, the PWB is overmolded using conventional epoxy transfer technology. After post-mold curing, the packages are solder bumped and electrically tested. Subsequently these are referred to as "bail grid array" (BGA) packages. Solder bumps are used for further interconnection of the BGA package, for example, to a "mother board". The mother board typically has a much larger area than the OMPAC BGA package, upon which may be arranged a number of other interconnected electrical elements, such as capacitors, transformers, and resistors, which cannot be conveniently integrated into the chips or modules, as well as other packaged IC's, BGAs, plugs and connectors.
The major advantages of OMPAC BGA packages as compared to leaded surface mount packages include increased packaging interconnect density due to an evenly spaced matrix of solder connections on the bottom side of the package, higher solder assembly yields, and no lead coplanarity problems.
However, it is desirable to reduce the thickness of the packages. Furthermore, it would be desirable to provide for efficient removal of heat from the IC unit.